Abstract: Importance of low voltage low power analog design techniques is increased due to modern trends towards use of battery operated portable electronics. This paper presents the low voltage power efficient class AB CMOS operational transconductance amplifier with enhanced gain and bandwidth operating at 0.4V. Complementary NMOS and PMOS differential pair is used to achieve rail to rail input stage are biased using two level shifter adaptive bias techniques to improve slew rate. Low voltage low power operation is achieved by operating transistors in weak inversion region. Class AB output stage, in which transistors connected in common source configuration, is employed. High CMRR is obtained by CMFF circuit which also biases the output stages. Operational transconductance amplifier (OTA) is designed in LTSPICE using 90nm DSM technology.

Keywords: OTA, weak inversion, adaptive bias, CMRR.